Mnemonics in Detail


$MOVE	(move)

Format	move{.b/.w/.l}	<ea>,<ea>
Process	Copies the source operand to the destination operand.
CCR	X N Z V C
	- * * 0 0

$MOVEA	(move address)

Format	movea{.w/.l}	<ea>,An
Process	Copies the source operand to the destination operand.
	Word-sized values will be sign extended. CCR is not affected.
CCR	X N Z V C
	- - - - -

$MOVEM from reg	(move multiple registers)

Format	movem{.w/.l}	<from d0-d7/a0-a7, as one chooses>,<ea>
Process	This is a command to store multiple registers into memory.
CCR	X N Z V C
	- - - - -

$MOVEM to reg	(move multiple registers)

Format	movem{.w/.l}	<ea>,<from of d0-d7/a0-a7, as one chooses>
Process	This is a command to recover register contents stored in memory.
CCR	X N Z V C
	- - - - -

$MOVEP to Dn	(move peripheral data)

Format	movep{.w/.l}	d16(An),Dn
Process	Command to read while skipping 1 byte at a time	from the
	specified effective address. Used to read from I/O devices.
CCR	X N Z V C
	- - - - -

$MOVEP from Dn	(move peripheral data)

Format	movep{.w/.l}	Dn,d16(an)
Process	Command to transfer data one byte at a time, starting from the
	top byte, to the address specified by the effective address.
CCR	X N Z V C
	- - - - -

$MOVEQ	(move quick)

Format	moveq{.l}	#<data>,Dn
Process	Transfers an 8-bit immediate value to a data register.
	All 32 bits are affected (negative values are sign extended).
	Possible values range from -128 to 127 ($FFFFFF80 to $0000007F).
CCR	X N Z V C
	- * * 0 0

$EXG	(exchange register)

Format	exg{.l}	<reg>,<reg>
Process	Swaps all 32 bits contained in the registers.
CCR	X N Z V C 
	- - - - -

$SWAP	(swap register halves)

Format	swap{.w}	Dn
Process	Swaps the top and bottom words of the specified register.
CCR	X N Z V C
	- * * 0 0

$LEA	(load effective address)

Format	lea{.l}	<ea>,An
Process	Transfers the effective address specified by <ea> to An.
	All 32 bits in An are affected.
CCR	X N Z V C
	- - - - -

$PEA	(push effective address)

Format	pea{.l}	<ea>
Process	Pushes the effective address specified by <ea> onto the stack.
	Uses SP (register A7) implicitly.
CCR	X N Z V C
	- - - - -

$LINK	(link and allocate)

Format	link	An,#<Area Length>
Process	Secures a local work area for a subroutine. It is necessary
	to specify a negative area length in order to avoid destroying
	the stack. Therefore, valid values range from -32768 to 0.
	Action 1: move.l  An,-(SP)
	Action 2: move.l  SP,An
	Action 3: add.l   #<Area Length>,SP
CCR	X N Z V C
	- - - - -

$UNLK	(unlink)

Format	unlk	An
Process	Frees the stack area secured by LINK.
	Action 1: move.l  An,sp
	Action 2: move.l  (sp)+,An
CCR	X N Z V C
	- - - - -

$ADD	(add)

Format	add{.b/.w/.l}	<ea>,<ea>
Process	Adds the source operand to the destination operand, storing the
	result in the destination operand.

	Byte-size operations are not allowed when using an address
	register for either <ea>. See ADDA if the destination is
	an address register.
CCR	X N Z V C
	* * * * *

$ADDA	(add address)

Format	adda{.w/.l}	<ea>,An
Process	Sums An and the source operand, then stores the result in An.

	When the operation size is 16-bit, 32-bit sign extension occurs.
CCR	X N Z V C
	- - - - -

$ADDI	(add immediate)

Format	addi{.b/.w/.l}	#<data>,<ea>
Process	Adds an immediate value to the destination operand and stores
	the sum in the destination operand. Please make sure the
	operation size and the size of the operands all match.
CCR	X N Z V C
	* * * * *

$ADDQ	(add quick)

Format	addq{.b/.w/.l}	#<data>,<ea>
Process	Adds an immediate value to the destination operand and stores
	the sum in the destination operand. The immediate value must be
	from 1 to 8.

	When the destination is an address register, only word and
	longword operation sizes are allowed, and all 32 bits of the
	destination register are affected, without changing the CCR.
CCR	X N Z V C
	* * * * *

$ADDX	(add extended)

Format	addx{.b/.w/.l}	Dn,Dn
	addx{.b/.w/.l}	-(An),-(An)
Process	Adds the source operand and the CCR's X bit to the destination
	operand, storing the result in the destination operand.
CCR	X N Z V C
	* * * * *

$SUB	(subtract)

Format	sub{.b/.w/.l}	Dn,<ea>
Process	Subtracts the source operand from the destination operand,
	storing the result in the destination operand.

	Byte-size operations are not permitted when using
	an address register for either <ea>. See SUBA if
	the destination is an address register.
CCR	X N Z V C
	* * * * *

$SUBA	(subtract address)

Format	suba{.w/.l}	<ea>,An
Process	Subtracts the source operand from the destination address,
	storing the result in the destination.

	When the operation size is 16-bit, 32-bit sign extension occurs.
CCR	X N Z V C
	- - - - -

$SUBI	(subtract immediate)

Format	subi{.b/.w/.l}	#<data>,<ea>
Process	Subtracts an immediate value from the destination operand,
	then replaces the destination operand with the difference.

	Make sure the operation size and the operand sizes all match.
CCR	X N Z V C
	* * * * *

$SUBQ	(subtract quick)

Format	subq{.b/.w/.l}	#<data>,<ea>
Process	Subtracts an immediate value from the destination operand,
	storing the sum in the destination operand. The immediate value
	must be from 1 to 8.

	When the destination is an address register, only word and
	longword operation sizes are allowed, and all 32 bits of the
	destination register are affected, without changing the CCR.
CCR	X N Z V C
	* * * * *

$SUBX	(subtract with extend)

Format	subx{.b/.w/.l}	Dn,Dn
	subx{.b/.w/.l}	-(An),-(An)
Process	Subtracts both the source operand and the CCR's X bit from the
	destination operand, storing the result in the destination.
CCR	X N Z V C
	* * * * *

$MULS	(multiply as signed)

Format	muls{.w}	<ea>,Dn
Process	Two signed 16-bit integer operands (range: -32768 to 32767) are
	multiplied, and the result is stored in the destination register
	as a 32-bit signed integer.
CCR	X N Z V C
	- * * 0 0

$MULU	(multiply as unsigned)

Format	mulu{.w}	<ea>,Dn
Process	Two unsigned 16-bit integer operands (range: 0 to 65535) are
	multiplied, and the result is stored in the destination register
	as a 32-bit unsigned integer.
CCR	X N Z V C
	- * * 0 0

$DIVS	(divide as signed)

Format	divs{.w}	<ea>,Dn
Process	Executes a signed division of the 32-bit destination register
	by the signed, 16-bit source operand. The results are placed
	in the destination register.

	If the source operand is a register, the bottom word is used.
	The destination must be a data register.
	All of the 32 bits of the dividend are used in the calculation.

	Results:
	- The quotient is stored in the bottom word of Dn.
	- The remainder is stored in the top word of Dn. Its sign will
	match that of the quotient, unless the remainder is zero.

	Error conditions:
	- An exception will occur if the divisor is zero.
	- When an overflow occurs (the quotient exceeds 16 bits),
	the V flag will be set.

	In both cases, the destination register will remain unmodified.

CCR	X N Z V C
	- * * * 0

$DIVU	(divide as unsigned)

Format	divu{.w}	<ea>,Dn
Process	Executes an unsigned division of the 32-bit destination register
	by the unsigned, 16-bit source operand. The results are placed
	in the destination register.

	If the source operand is a register, the bottom word is used.
	The destination must be a data register.
	All of the 32 bits of the dividend are used in the calculation.

	Results:
	- The quotient is stored in the bottom word of Dn.
	- The remainder is stored in the top word of Dn. Its sign will
	match that of the quotient, unless the remainder is zero.

	Error conditions:
	- An exception will occur if the divisor is zero.
	- When an overflow occurs (the quotient exceeds 16 bits),
	the V flag will be set.

	In both cases, the destination register will remain unmodified.

CCR	X N Z V C
	- * * * 0

$CMP	(compare)

Format	cmp{.b/.w/.l}	<ea>,Dn
Process	Subtracts the source operand from the destination register,
	then sets the CCR based on the result. Only the CCR is modified.
CCR	X N Z V C
	- * * * *

$CMPA	(compare address)

Format	cmpa{.w/.l}	<ea>,An
Process	Subtracts the source operand from the destination address
	register, setting the CCR based on the result. The destination
	register is not modified.

	When the operation is word-sized, the source operand will be
	sign extended to 32 bits and compared with the 32-bit address
	in the destination register. Use caution in this situation.
CCR	X N Z V C
	- * * * *

$CMPI	(compare immediate)

Format	cmpi{.b/.w/.l}	#<data>,<ea>
Process	Subtracts an immediate value from the destination operand,
	then sets the CCR based on the result. Only the CCR is modified.

	Make sure the operation size and the operand sizes all match.
CCR	X N Z V C
	- * * * *

$CMPM	(compare memory)

Format	cmpm{.b/.w/.l}	(An)+,(An)+
Process	Subtracts the source operand from the destination operand,
	then sets the CCR based on the result. Only the CCR is modified.

	The only addressing mode permitted is address register indirect
	with post-increment. This makes the instruction useful for
	carrying out comparisons and searches with blocks of memory.
CCR	X N Z V C
	- * * * *

$CLR	(clear an operand)

Format	clr{.b/.w/.l}	<ea>
Process	Clears all bits of the destination operand.
	For data registers, the MOVEQ command is actually quicker.
CCR	X N Z V C
	- 0 1 0 0

$EXT	(sign extend)

Format	ext{.w/.l}	Dn
Process	Replicates the sign bit of the data register in order to
	sign extend either a byte to a word (word operation size)
	or a word to a longword (longword operation size).
	(The sign bits are bit 7 and bit 15 respectively.)
CCR	X N Z V C
	- * * 0 0

$NEG	(negative)

Format	neg{.b/.w/.l}	<ea>
Process	Subtracts the destination operand from zero and stores the
	result in the destination operand.
CCR	X N Z V C
	* * * * *

$NEGX	(negative with extend)

Format	negx{.b/.w/.l}	<ea>
Process	Subtracts the destination operand and the CCR's X bit from zero,
	storing the result in the destination operand.
CCR	X N Z V C
	* * * * *

$TST	(test an operand)

Format	tst{.b/.w/.l}	<ea>
Process	Subtracts zero from the destination operand, setting the CCR
	based on the result.
CCR	X N Z V C
	* * * * *

$AND	(and logical)

Format	and{.b/.w/.l}	<ea>,<ea>
Process	Executes the logical multiplication of the operands,
	storing the result in the destination operand.

	The direct address register addressing mode is prohibited.
CCR	X N Z V C
	- * * 0 0

$ANDI	(and immediate)

Format	andi{.b/.w/.l}	#<data>,<ea>
Process	Executes the logical multiplication of the destination with an
	immediate value, storing the result in the destination operand.

	The direct address register addressing mode is prohibited.
	Make sure the operation size and the operand sizes all match.
CCR	X N Z V C
	- * * 0 0

$EOR	(exclusive or logical)

Format	eor{.b/.w/.l}	Dn,<ea>
Process	Executes the exclusive OR operation of the operands,
	storing the result in the destination operand.

	The direct address register addressing mode is prohibited.
CCR	X N Z V C
	- * * 0 0

$EORI	(exclusive or immediate)

Format	eori{.b/.w/.l}	#<data>,<ea>
Process	Executes the exclusive OR operation of the destination with an
	immediate value, storing the result in the destination operand.

	The direct address register addressing mode is prohibited.
	Make sure the operation size and the operand sizes all match.
CCR	X N Z V C
	- * * 0 0

$OR	(inclusive or logical)

Format	or{.b/.w/.l}	<ea>,<ea>
Process	Performs the logical addition of the operands,
	storing the result in the destination operand.

	The direct address register addressing mode is prohibited.
CCR	X N Z V C
	- * * 0 0

$ORI	(inclusive or immediate)

Format	ori{.b/.w/.l}	#<data>,<ea>
Process	Performs the logical addition of the destination with an
	immediate value, storing the result in the destination operand.

	The direct address register addressing mode is prohibited.
	Make sure the operation size and the operand sizes all match.
CCR	X N Z V C
	- * * 0 0

$NOT	(logical complement)

Format	not{.b/.w/.l}	<ea>
Process	Takes the one's complement of the destination operand
	and stores the result in the same place.
CCR	X N Z V C
	- * * 0 0

$ASL	(arithmetic shift left)

Format	asl{.b/.w/.l}	Dn,Dn
	asl{.b/.w/.l}	#<data>,Dn
Process	Performs a left arithmetic shift on the destination operand.

	The number of bits to shift is taken from the source operand.
	Immediate values are restricted to a range from 1 to 8.

	The V bit in the CCR will be set if the sign changes.
	
	<C>
	    <==|destination operand|<==0
	<X>
CCR	X N Z V C
	* * * * *

$ASL	(arithmetic shift left)

Format	asl{.w}	<ea>
Process	Performs a single left arithmetic shift on a word in memory.

	The operation size is restricted to 16 bits.

	The V bit in the CCR will be set if the sign changes.

	<C>
	    <==|destination operand|<==0
	<X>
CCR	X N Z V C
	* * * * *

$ASR	(arithmetic shift right)

Format	asr{.b/.w/.l}	Dn,Dn
	asr{.b/.w/.l}	#<data>,Dn
Process	Performs a right arithmetic shift on the destination operand.

	The number of bits to shift is taken from the source operand.
	Immediate values are restricted to a range from 1 to 8.

	The sign bit will be copied to the top bit on each shift.
					<C>
		|destination operand| ==>
					<X>
CCR	X N Z V C
	* * * 0 *

$ASR	(arithmetic shift right)

Format	asr{.w}	<ea>
Process	Performs a single right arithmetic shift on a word in memory.

	The operation size is restricted to 16 bits.

	The V bit in the CCR will be set if the sign changes.

	The sign bit will be copied to the top bit on each shift.

					<C>
		|destination operand| ==>
					<X>
CCR	X N Z V C
	* * * 0 *

$LSL	(logical shift left)

Format	lsl{.b/.w/.l}	Dn,Dn
	lsl{.b/.w/.l}	#<data>,Dn
Process	Performs a left logical shift on the destination operand.

	The number of bits to shift is taken from the source operand.
	Immediate values are restricted to a range from 1 to 8.

	<C>
	    <==|destination operand|<==0
	<X>
CCR	X N Z V C
	* * * 0 *

$LSL	(logical shift left)

Format	lsl{.w}	<ea>
Process	Performs a single left logical shift on a word in memory.

	The operation size is restricted to 16 bits.

	<C>
	    <==|destination operand|<==0
	<X>
CCR	X N Z V C
	* * * 0 *


$LSR	(logical shift right)

Format	lsr{.b/.w/.l}	Dn,Dn
	lsr{.b/.w/.l}	#<data>,Dn
Process	Performs a right logical shift on the destination operand.

	The number of bits to shift is taken from the source operand.
	Immediate values are restricted to a range from 1 to 8.

					<C>
	    0==>|destination operand|==>
					<X>
CCR	X N Z V C
	* * * 0 *

$LSR	(logical shift right)

Format	lsr{.w}	<ea>
Process	Performs a single right logical shift on a word in memory.

	The operation size is restricted to 16 bits.

					<C>
	    0==>|destination operand|==>
					<X>
CCR	X N Z V C
	* * * 0 *

$ROL	(rotate left)

Format	rol{.b/.w/.l}	Dn,Dn
	rol{.b/.w/.l}	#<data>,Dn
Process	Rotates the destination operand to the left.

	The top bit is moved to the bottom and copied to the carry flag.

	The number of rotations is taken from the source operand.
	Immediate values are restricted to a range from 1 to 8.
CCR	X N Z V C
	- * * 0 *

$ROL	(rotate left)

Format	rol{.w}	<ea>
Process	Rotates a word in memory to the left a single time.

	The top bit is moved to the bottom and copied to the carry flag.

	The operation size is restricted to 16 bits.
CCR	X N Z V C
	- * * 0 *

$ROR	(rotate right)

Format	ror{.b/.w/.l}	Dn,Dn
	ror{.b/.w/.l}	#<data>,Dn
Process	Rotates the destination operand to the right.

	The low bit is moved to the top and copied to the carry flag.

	The number of rotations is taken from the source operand.
	Immediate values are restricted to a range from 1 to 8.
CCR	X N Z V C
	- * * 0 *

$ROR	(rotate right)

Format	ror{.w}	<ea>
Process	Rotates a word in memory to the right a single time.

	The low bit is moved to the top and copied to the carry flag.

	The operation size is restricted to 16 bits.
CCR	X N Z V C
	- * * 0 *

$ROXL	(rotate with extend left)

Format	roxl{.b/.w/.l}	Dn,Dn
	roxl{.b/.w/.l}	#<data>,Dn
Process Performs a leftward rotation on the destination operand with
	the X bit acting as an extra high-order bit. The source operand
	defines the number of rotations.

	Bits shifted out of the operand will go to the X bit (and will
	also be copied to the carry flag), while the previous contents
	of the X bit will rotate into the operand's low-order bit.

	Immediate values are restricted to a range from 1 to 8.
CCR	X N Z V C
	* * * 0 *

$ROXL	(rotate with extend left)

Format	roxl{.w}	<ea>
Process	Performs a single leftward rotation on a word in memory with
	the X bit acting as an extra high-order bit.

	The bit shifted out of the operand goes to the X bit (and will
	also be copied to the carry flag), while the previous contents
	of the X bit will rotate into the operand's low-order bit.

	The operation size is restricted to 16 bits.
CCR	X N Z V C
	* * * 0 *

$ROXR	(rotate with extend right)

Format	roxr{.b/.w/.l}	Dn,Dn
	roxr{.b/.w/.l}	#<data>,Dn
Process	Performs a rightward rotation on the destination operand with
	the X bit acting as an extra low-order bit. The source operand
	defines the number of rotations.

	Bits shifted out of the operand will go to the X bit (and will
	also be copied to the carry flag), while the previous contents
	of the X bit will rotate into the operand's high-order bit.

	Immediate values are restricted to a range from 1 to 8.
CCR	X N Z V C
	* * * 0 *

$ROXR	(rotate with extend right)

Format	roxr{.w}	<ea>
Process	Performs a single leftward rotation on a word in memory with
	the X bit acting as an extra high-order bit.

	The bit shifted out of the operand goes to the X bit (and will
	also be copied to the carry flag), while the previous contents
	of the X bit will rotate into the operand's high-order bit.

	The operation size is restricted to 16 bits.
CCR	X N Z V C
	* * * 0 *

$BTST	(test a bit)

Format	btst{.b/.l}	Dn,<ea>
	btst{.b/.l}	#<data>,<ea>
Process	Compares a single bit in the destination operand against zero,
	setting or clearing the Z flag accordingly. The source operand
	defines the bit number.

	Destination operands in memory are restricted to 8 bits in size.
	All 32 bits can be tested if the destination is a register.
CCR	X N Z V C
	- - * - -

$BSET	(test a bit and set)

Format	bset{.b/.l}	Dn,<ea>
	bset{.b/.l}	#<data>,<ea>
Process	Compares a single bit in the destination operand against zero,
	setting or clearing the Z flag accordingly. The bit is then set.
	The source operand defines the bit number.

	Destination operands in memory are restricted to 8 bits in size.
	All 32 bits can be tested if the destination is a register.
CCR	X N Z V C
	- - * - -


$BCLR	(test a bit and clear)

Format	bclr{.b/.l}	Dn,<ea>
	bclr{.b/.l}	#<data>,<ea>
Process	Compares a single bit in the destination operand against zero,
	setting or clearing the Z flag accordingly. The bit will then
	be reset. The source operand defines the bit number.

	Destination operands in memory are restricted to 8 bits in size.
	All 32 bits can be tested if the destination is a register.
CCR	X N Z V C
	- - * - -

$BCHG	(test a bit and change)

Format	bchg{.b/.l}	Dn,<ea>
	bchg{.b/.l}	#<data>,<ea>
Process	Compares a single bit in the destination operand against zero,
	setting or clearing the Z flag accordingly. The bit will then
	be flipped. The source operand defines the bit number.

	Destination operands in memory are restricted to 8 bits in size.
	All 32 bits can be tested if the destination is a register.
CCR	X N Z V C
	- - * - -

$Bcc	(branch conditionally)

Format	Bcc{.b/.w}	<LABEL>
Process	If the condition specified in the instruction mnemonic is met,
	the program counter is set to the address indicated by LABEL.
	(In other words, it jumps to that address.)

	If a "CMP X,Y" instruction was executed immediately prior,
	then the following condition decisions are possible.

Condition	Unsigned		Signed
-------------------------------------------------------------
y >  x		HI (higher)		GT (greater than)
y >= x		CC (carry clear)	GE (greater or equal)
y == x		EQ (equal)		EQ (equal)
y >< x		NE (not equal)		NE (not equal)
y <  x		CS (carry set)		LT (less than)
y <= x		LS (lower or same)	LE (less or equal)

	Additional conditionals include:

	PL (plus), MI (minus), VC (overflow clear), VS (overflow set)

CCR	X N Z V C
	- - - - -

$DBcc	(test condition, decrement, and branch)

Format	DBcc{.w}	Dn,<LABEL>
Process	This is a loop control command.
	The following sequence occurs on execution:

	1: The completion condition of the loop (cc) is checked.
	2: If true, execution proceeds at the next command.
	3: If false, the loop counter (Dn) is decremented.
	4: If Dn is now -1, execution proceeds at the next command.
	5: If Dn is not -1, the PC is set to the address <LABEL>

	Please refer to the Bcc entry for more information about
	the conditional part. Additional conditionals available for
	this instructions are: F / RA (always false), T (always true).

CCR	X N Z V C
	- - - - -

$Scc	(set according to condition)

Format	Scc{.b}	<ea>
Process	If the condition specified in the instruction mnemonic is met,
	all 8 bits of destination operand will be set, otherwise all 8
	of the bits will be reset. Please refer to the Bcc entry for
	more information about the conditional part. 
CCR	X N Z V C
	- - - - -

$BRA	(branch always)

Format	bra{.b/.w}	<LABEL>
Process	This is an unconditional branch command. Since the relative
	offset can be, at most, 16 bits, care should be exercised when
	writing large programs.	(Most assemblers will detect a branch
	to an out-of-range address and report it as an offset error.)
CCR	X N Z V C
	- - - - -

$BSR	(branch to subroutine)

Format	bsr{.b/.w}	<LABEL>
Process	This is a subroutine call command. After pushing the PC to the
	stack, execution will resume at the address specified by LABEL.
	See also the BRA command discussion about relative addresses.
CCR	X N Z V C
	- - - - -

$JMP	(jump)

Format	jmp	<ea>
Process	This is an unconditional branch command. It substitutes the
	address indicated by <ea> for the PC. Any arbitrary address
	can be accessed through this instruction.
CCR	X N Z V C
	- - - - -

$JSR	(jump to subroutine)

Format	jsr	<ea>
Process	This is a subroutine call command. After pushing the PC to the
	stack, execution will resume at the address specified by LABEL.
	Any arbitrary address can be accessed through this instruction.
CCR	X N Z V C
	- - - - -

$RTR	(return and restore condition codes)

Format	rtr
Process	Extracts the CCR and PC from the stack.
CCR	X N Z V C
	* * * * *

$RTS	(return from subroutine)

Format	rts
Process	Extracts the PC (return address in this case) from the stack.
	This command reverse the subroutine call commands (BSR/JSR).
CCR	X N Z V C
	- - - - -

$NOP	(no operation)

Format	nop
Process	Execution proceeds at the following instruction.
CCR	X N Z V C
	- - - - -

$TRAP	(trap)

Format	trap	#<vector number>
Process	Starts exception handling. The vector numbers are as follows:
	#0 ~ #7	(Available to use)
	#8	System reserved
	#9	Break point for DB.X and SCD.X
	#10	POWER OFF/RESET process
	#11	HDOFF, etc. invoked by the BREAK key
	#12	Hard copy, etc. invoked by the COPY key
	#13	Setting of break check flag by the CTRL+C combination
	#14	Error display
	#15	IOCS CALL
CCR	X N Z V C
	- - - - -

$TRAPV	(trap on overflow)

Format	trapv
Process	Generates an exception (vector 7 / $1C) if the V (overflow) flag
	is set; otherwise does nothing.
CCR	X N Z V C
	- - - - -

$CHK	(check register against bounds)

Format	chk{.w}	<ea>,Dn
Process	Carries out the following conditional decisions:

	1: If Dn < 0, sets the N bit and generates a CHK exception.
	2: If Dn > (<ea>), clears N bit and generates a CHK exception.
	3: If 0 <= Dn <= (<ea>), does nothing.

	The exception vector is 6 / $18.
CCR	X N Z V C
	- * U U U

$ABCD	(add decimal with extend)

Format	abcd{.b}	Dn,Dn
	abcd{.b}	-(An),-(An)
Process	This is a binary coded decimal addition command.
	The source operand and the X bit are added to the destination
	operand. The result is stored in the destination.

	The X and C bits are set if there was a decimal carry.
CCR	X N Z V C
	* U * U *

$SBCD	(subtract decimal with extend)

Format	sbcd{.b}	Dn,Dn
	sbcd{.b}	-(An),-(An)
Format	This is a binary coded decimal subtraction command.
	The source operand and the X bit are subtracted from the
	destination operand. The result is stored in the destination.

	The X and C bits are set if there was a decimal borrow.
CCR	X N Z V C
	* U * U *

$NBCD	(negate decimal with extend)

Format	nbcd{.b}	<ea>
Process	Subtracts the destination operand and X bit from 0,
	storing the result in the destination operand.

	In other words, if the X bit is 0, the complement will be 10,
	and if it's 1, the complement will be 9.
CCR	X N Z V C
	* U * U *

$MOVE to CCR	(move to condition code register)

Format	move{.w}	<ea>,CCR
Process	Copies bits 0 to 4 of the source operand into the CCR.
CCR	X N Z V C
	* * * * *

*MOVE to SR	(move to status register)

Format	move{.w}	<ea>,SR
Process	Writes the source operand into the SR.
CCR	X N Z V C
	* * * * *

$MOVE from SR	(move from status register)

Format	move{.w}	SR,<ea>
Process	Transfers the SR to the destination operand.

	This command is privileged on the 68010 and later processors.
CCR	X N Z V C
	- - - - -

*MOVE from USP	(move from user stack pointer)

Format	move{.l}	USP,An
Process	Transfers the contents of the USP into an address register.
CCR	X N Z V C
	- - - - -

*MOVE to USP	(move to user stack pointer)

Format	move{.l}	An,USP
Process	Transfers the contents of an address register into the USP.
CCR	X N Z V C
	- - - - -

$ANDI to CCR

Format	andi{.b}	#<data>,CCR
Process	Executes the logical multiplication of the CCR by an immediate
	value, storing the result in the CCR.
CCR	X N Z V C
	* * * * *

*ANDI to SR

Format	andi{.w}	#<data>,SR
Process	Executes the logical multiplication of the SR by an immediate
	value, storing the result in the SR.
CCR	X N Z V C
	* * * * *

$EORI	to CCR

Format	eori{.b}	#<data>,CCR
Process	Executes the exclusive OR operation of the CCR with an
	immediate value, storing the result in the CCR.
CCR	X N Z V C
	* * * * *

*EORI to SR

Format	eori{.w}	#<data>,SR
Process	Executes the exclusive OR operation of the SR with an
	immediate value, storing the result in the SR.
CCR	X N Z V C
	* * * * *

$ORI to CCR

Format	ori{.b}	#<data>,CCR
Process	Performs the logical addition of the CCR with an immediate
	value, storing the result in the CCR.
CCR	X N Z V C
	* * * * *

*ORI to SR

Format	ori{.w}	#<data>,SR
Process	Performs the logical addition of the SR with an immediate
	value, storing the result in the SR.
CCR	X N Z V C
	* * * * *

*RTE	(return from exception)

Format	rte
Process	This command is used to return from exception handling.
	It restores the SR and PC from the stack.
CCR	X N Z V C
	* * * * *

*RESET	(reset external devices)

Format	reset
Process	Asserts the reset line of the MPU for 124 clock pulses,
	then executes the following command.
CCR	X N Z V C
	- - - - -

*STOP	(load status register and stop)

Format	stop	#<data>
Process	The processor writes the specified immediate value to the SR
	and sets the PC	to the address of the following instruction,
	but stops loading/executing further commands.

	If the trace bit is set, trace exception handling will occur.

	Rebooting happens in the following cases:
	1: In case an interrupt request occurs with a priority higher
	   than the processor is currently executing at.
	2: External reset
CCR	X N Z V C
	* * * * *